Design of High-Performance Microprocessor Circuits


Author: Anantha Chandrakasan,Frank Fox,William J. Bowhill
Publisher: Wiley-IEEE Press
ISBN: 9780780360013
Category: Technology & Engineering
Page: 557
View: 9921

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The authors present readers with a compelling, one-stop, advanced system perspective on the intrinsic issues of digital system design. This invaluable reference prepares readers to meet the emerging challenges of the device and circuit issues associated with deep submicron technology. It incorporates future trends with practical, contemporary methodologies.

Power Distribution Networks in High Speed Integrated Circuits


Author: Andrey Mezhiba,Eby G. Friedman
Publisher: Springer Science & Business Media
ISBN: 146150399X
Category: Technology & Engineering
Page: 280
View: 5996

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Distributing power in high speed, high complexity integrated circuits has become a challenging task as power levels exceeding tens of watts have become commonplace while the power supply is plunging toward one volt. This book is dedicated to this important subject. The primary purpose of this monograph is to provide insight and intuition into the behavior and design of power distribution systems for high speed, high complexity integrated circuits.

High-Speed Clock Network Design


Author: Qing K. Zhu
Publisher: Springer Science & Business Media
ISBN: 147573705X
Category: Technology & Engineering
Page: 188
View: 4285

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High-Speed Clock Network Design is a collection of design concepts, techniques and research works from the author for clock distribution in microprocessors and high-performance chips. It is organized in 11 chapters.

High-speed Circuit Board Signal Integrity


Author: Stephen C. Thierauf
Publisher: Artech House
ISBN: 9781580538466
Category: Technology & Engineering
Page: 243
View: 5472

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This leading-edge circuit design resource offers the knowledge needed to quickly pinpoint transmission problems that can compromise circuit design. Discusses both design and debug issues at gigabit per second data rates.

Understanding Signal Integrity


Author: Stephen C. Thierauf
Publisher: Artech House
ISBN: 1596939826
Category: Electrical engineering
Page: 256
View: 9056

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This unique book provides you with practical guidance on understanding and interpreting signal integrity (SI) performance to help you with your challenging circuit board design projects. You find high-level discussions of important SI concepts presented in a clear and easily accessible format, including question and answer sections and bulleted lists.This valuable resource features rules of thumb and simple equations to help you make estimates of critical signal integrity parameters without using circuit simulators of CAD (computer-aided design). The book is supported with over 120 illustrations, nearly 100 equations, and detailed reference lists at the end of each chapter.

System-Level Analysis and Design under Uncertainty


Author: Ivan Ukhov
Publisher: Linköping University Electronic Press
ISBN: 9176854264
Category: Electronic books
Page: 192
View: 4329

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One major problem for the designer of electronic systems is the presence of uncertainty, which is due to phenomena such as process and workload variation. Very often, uncertainty is inherent and inevitable. If ignored, it can lead to degradation of the quality of service in the best case and to severe faults or burnt silicon in the worst case. Thus, it is crucial to analyze uncertainty and to mitigate its damaging consequences by designing electronic systems in such a way that they effectively and efficiently take uncertainty into account. We begin by considering techniques for deterministic system-level analysis and design of certain aspects of electronic systems. These techniques do not take uncertainty into account, but they serve as a solid foundation for those that do. Our attention revolves primarily around power and temperature, as they are of central importance for attaining robustness and energy efficiency. We develop a novel approach to dynamic steady-state temperature analysis of electronic systems and apply it in the context of reliability optimization. We then proceed to develop techniques that address uncertainty. The first technique is designed to quantify the variability of process parameters, which is induced by process variation, across silicon wafers based on indirect and potentially incomplete and noisy measurements. The second technique is designed to study diverse system-level characteristics with respect to the variability originating from process variation. In particular, it allows for analyzing transient temperature profiles as well as dynamic steady-state temperature profiles of electronic systems. This is illustrated by considering a problem of design-space exploration with probabilistic constraints related to reliability. The third technique that we develop is designed to efficiently tackle the case of sources of uncertainty that are less regular than process variation, such as workload variation. This technique is exemplified by analyzing the effect that workload units with uncertain processing times have on the timing-, power-, and temperature-related characteristics of the system under consideration. We also address the issue of runtime management of electronic systems that are subject to uncertainty. In this context, we perform an early investigation of the utility of advanced prediction techniques for the purpose of finegrained long-range forecasting of resource usage in large computer systems. All the proposed techniques are assessed by extensive experimental evaluations, which demonstrate the superior performance of our approaches to analysis and design of electronic systems compared to existing techniques.

Modern VLSI Design

IP-Based Design
Author: Wayne Wolf
Publisher: Pearson Education
ISBN: 9780137010080
Category: Technology & Engineering
Page: 656
View: 5578

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The Number 1 VLSI Design Guide—Now Fully Updated for IP-Based Design and the Newest Technologies Modern VLSI Design, Fourth Edition, offers authoritative, up-to-the-minute guidance for the entire VLSI design process—from architecture and logic design through layout and packaging. Wayne Wolf has systematically updated his award-winning book for today’s newest technologies and highest-value design techniques. Wolf introduces powerful new IP-based design techniques at all three levels: gates, subsystems, and architecture. He presents deeper coverage of logic design fundamentals, clocking and timing, and much more. No other VLSI guide presents as much up-to-date information for maximizing performance, minimizing power utilization, and achieving rapid design turnarounds.

Closing the Gap Between ASIC & Custom

Tools and Techniques for High-Performance ASIC Design
Author: David Chinnery,Kurt Keutzer
Publisher: Springer Science & Business Media
ISBN: 1402071132
Category: Computers
Page: 407
View: 5463

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This book carefully details design tools and techniques for high-performance ASIC design. Using these techniques, the performance of ASIC designs can be improved by two to three times. Important topics include: Improving performance through microarchitecture; Timing-driven floorplanning; Controlling and exploiting clock skew; High performance latch-based design in an ASIC methodology; Automatically identifying and synthesizing complex logic gates; Automated cell sizing to increase performance and reduce power; Controlling process variation.These techniques are illustrated by designs running two to three times the speed of typical ASICs in the same process generation.

The Computer Engineering Handbook


Author: Vojin G. Oklobdzija
Publisher: CRC Press
ISBN: 1420041541
Category: Computers
Page: 1408
View: 2859

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There is arguably no field in greater need of a comprehensive handbook than computer engineering. The unparalleled rate of technological advancement, the explosion of computer applications, and the now-in-progress migration to a wireless world have made it difficult for engineers to keep up with all the developments in specialties outside their own. References published only a few years ago are now sorely out of date. The Computer Engineering Handbook changes all of that. Under the leadership of Vojin Oklobdzija and a stellar editorial board, some of the industry's foremost experts have joined forces to create what promises to be the definitive resource for computer design and engineering. Instead of focusing on basic, introductory material, it forms a comprehensive, state-of-the-art review of the field's most recent achievements, outstanding issues, and future directions. The world of computer engineering is vast and evolving so rapidly that what is cutting-edge today may be obsolete in a few months. While exploring the new developments, trends, and future directions of the field, The Computer Engineering Handbook captures what is fundamental and of lasting value.

Low Power VLSI Design and Technology


Author: Gary K. Yeap,Farid N. Najm
Publisher: World Scientific
ISBN: 9789810225186
Category: Technology & Engineering
Page: 118
View: 2574

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Low-power and low-energy VLSI has become an important issue in today's consumer electronics.This book is a collection of pioneering applied research papers in low power VLSI design and technology.A comprehensive introductory chapter presents the current status of the industry and academic research in the area of low power VLSI design and technology.Other topics cover logic synthesis, floorplanning, circuit design and analysis, from the perspective of low power requirements.The readers will have a sampling of some key problems in this area as the low power solutions span the entire spectrum of the design process. The book also provides excellent references on up-to-date research and development issues with practical solution techniques.

Design of High-Performance CMOS Voltage-Controlled Oscillators


Author: Liang Dai,Ramesh Harjani
Publisher: Springer Science & Business Media
ISBN: 1461511453
Category: Technology & Engineering
Page: 158
View: 9697

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Design of High-Performance CMOS Voltage-Controlled Oscillators presents a phase noise modeling framework for CMOS ring oscillators. The analysis considers both linear and nonlinear operation. It indicates that fast rail-to-rail switching has to be achieved to minimize phase noise. Additionally, in conventional design the flicker noise in the bias circuit can potentially dominate the phase noise at low offset frequencies. Therefore, for narrow bandwidth PLLs, noise up conversion for the bias circuits should be minimized. We define the effective Q factor (Qeff) for ring oscillators and predict its increase for CMOS processes with smaller feature sizes. Our phase noise analysis is validated via simulation and measurement results. The digital switching noise coupled through the power supply and substrate is usually the dominant source of clock jitter. Improving the supply and substrate noise immunity of a PLL is a challenging job in hostile environments such as a microprocessor chip where millions of digital gates are present.

Design of High-speed Communication Circuits


Author: Ramesh Harjani
Publisher: World Scientific
ISBN: 9812565906
Category: Technology & Engineering
Page: 222
View: 3415

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MOS technology has rapidly become the de facto standard for mixed-signal integrated circuit design due to the high levels of integration possible as device geometries shrink to nanometer scales. The reduction in feature size means that the number of transistor and clock speeds have increased significantly. In fact, current day microprocessors contain hundreds of millions of transistors operating at multiple gigahertz. Furthermore, this reduction in feature size also has a significant impact on mixed-signal circuits. Due to the higher levels of integration, the majority of ASICs possesses some analog components. It has now become nearly mandatory to integrate both analog and digital circuits on the same substrate due to cost and power constraints. This book presents some of the newer problems and opportunities offered by the small device geometries and the high levels of integration that is now possible.The aim of this book is to summarize some of the most critical aspects of high-speed analog/RF communications circuits. Attention is focused on the impact of scaling, substrate noise, data converters, RF and wireless communication circuits and wireline communication circuits, including high-speed I/O.

Integrated Modeling of Chemical Mechanical Planarization for Sub-Micron IC Fabrication

From Particle Scale to Feature, Die and Wafer Scales
Author: Jianfeng Luo,David A. Dornfeld
Publisher: Springer Science & Business Media
ISBN: 9783540223696
Category: Science
Page: 311
View: 9386

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This book is the product of a developing research focus on CMP at Berkeley. Its focus is on the important area of process models which have not kept pace with the tremendous expansion of applications of CMP. It specifically deals with the development of models with sufficient detail to allow the evaluation and tradeoff of process inputs and parameters to assess impact on quality or quantity of production. The important role of the mechanical elements of the process are included in such an "integrated model". The objective of the book is to introduce some background on the overlooked mechanical aspects of the process - including pad surface topography and abrasive particles. The "integrated model" can be particularly useful as one looks towards optimization of the process, design of consumables and, importantly, looking to minimize the environmental affects of CMP.

Multi-voltage CMOS Circuit Design


Author: Volkan Kursun,Eby G. Friedman
Publisher: John Wiley & Sons
ISBN: 047001024X
Category: Technology & Engineering
Page: 242
View: 6095

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This book presents an in-depth treatment of various power reduction and speed enhancement techniques based on multiple supply and threshold voltages. A detailed discussion of the sources of power consumption in CMOS circuits will be provided whilst focusing primarily on identifying the mechanisms by which sub-threshold and gate oxide leakage currents are generated. The authors present a comprehensive review of state-of-the-art dynamic, static supply and threshold voltage scaling techniques and discuss the pros and cons of supply and threshold voltage scaling techniques.

High-Performance System Design

Circuits and Logic
Author: Vojin G. Oklobdzija
Publisher: Wiley-IEEE Press
ISBN: N.A
Category: Technology & Engineering
Page: 537
View: 8828

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"This comprehensive collection of papers offers you practical information that can be used to develop high-performance digital system design. Specially written introductions by editor Vojin G. Oklobdzija precede each chapter to aid your understanding of the most relevant topics in this advanced area of circuit design. Featured topics include: * Differential pass-transistor logic * High-speed circuits and design of high-performance systems * Advanced deep submicron circuits used in high-speed computers and digital circuits * Clocking and latch design essential to high-performance systems * Relationships between VLSI algorithms and implementation techniques HIGH PERFORMANCE SYSTEM DESIGN: Circuits and Logic is indispensable reading for circuit designers, practicing engineers, and students who want to master the basic principles underlying high-performance system design. This handy, single volume provides a useful reference to a collection of accumulated experience necessary for good, successful designs. Professors: To request an examination copy simply e-mail [email protected]" Sponsored by: IEEE Solid-State Circuits Council/Society.

Low Power Design in Deep Submicron Electronics


Author: W. Nebel,Jean Mermet
Publisher: Springer Science & Business Media
ISBN: 9780792345695
Category: Computers
Page: 580
View: 9085

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Decreasing power dissipation per logic function has become a primary concern in virtually all CMOS system chips designed today as a result of the relentless progress in processing technology that has led us into the deep-submicron age. Evolution from 1 micron to 0.1 micron lithography in the next decade will not be possible without a change in the way we design CMOS systems. But power reduction requires an overall optimisation, ranging from software compilation over instruction set design down to the introduction of much more parallelism in the architecture, the optimal use of memory hierarchy, new clocking strategies, use of asynchronous techniques, new CMOS circuit techniques and management of leakage currents in new low power technologies. Moreover, performance and power dissipation will come to be dominated by interconnect and thus completely new floor planning and place and route strategies are emerging. The chapters in this book present a systematic coverage of deep submicron CMOS digital system design for low power, from process technology all the way up to software design and embedded software systems. Audience: An excellent guide for the practising engineer, researcher and student interested in this crucial aspect of actual CMOS design.

Adiabatic Logic

Future Trend and System Level Perspective
Author: Philip Teichmann
Publisher: Springer Science & Business Media
ISBN: 9789400723450
Category: Technology & Engineering
Page: 166
View: 1292

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Adiabatic logic is a potential successor for static CMOS circuit design when it comes to ultra-low-power energy consumption. Future development like the evolutionary shrinking of the minimum feature size as well as revolutionary novel transistor concepts will change the gate level savings gained by adiabatic logic. In addition, the impact of worsening degradation effects has to be considered in the design of adiabatic circuits. The impact of the technology trends on the figures of merit of adiabatic logic, energy saving potential and optimum operating frequency, are investigated, as well as degradation related issues. Adiabatic logic benefits from future devices, is not susceptible to Hot Carrier Injection, and shows less impact of Bias Temperature Instability than static CMOS circuits. Major interest also lies on the efficient generation of the applied power-clock signal. This oscillating power supply can be used to save energy in short idle times by disconnecting circuits. An efficient way to generate the power-clock is by means of the synchronous 2N2P LC oscillator, which is also robust with respect to pattern-induced capacitive variations. An easy to implement but powerful power-clock gating supplement is proposed by gating the synchronization signals. Diverse implementations to shut down the system are presented and rated for their applicability and other aspects like energy reduction capability and data retention. Advantageous usage of adiabatic logic requires compact and efficient arithmetic structures. A broad variety of adder structures and a Coordinate Rotation Digital Computer are compared and rated according to energy consumption and area usage, and the resulting energy saving potential against static CMOS proves the ultra-low-power capability of adiabatic logic. In the end, a new circuit topology has to compete with static CMOS also in productivity. On a 130nm test chip, a large scale test vehicle containing an FIR filter was implemented in adiabatic logic, utilizing a standard, library-based design flow, fabricated, measured and compared to simulations of a static CMOS counterpart, with measured saving factors compliant to the values gained by simulation. This leads to the conclusion that adiabatic logic is ready for productive design due to compatibility not only to CMOS technology, but also to electronic design automation (EDA) tools developed for static CMOS system design.

High-Frequency Integrated Circuits


Author: Sorin Voinigescu
Publisher: Cambridge University Press
ISBN: 110731061X
Category: Technology & Engineering
Page: N.A
View: 714

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A transistor-level, design-intensive overview of high speed and high frequency monolithic integrated circuits for wireless and broadband systems from 2 GHz to 200 GHz, this comprehensive text covers high-speed, RF, mm-wave and optical fiber circuits using nanoscale CMOS, SiGe BiCMOS and III-V technologies. Step-by-step design methodologies, end-of-chapter problems and practical simulation and design projects are provided, making this an ideal resource for senior undergraduate and graduate courses in circuit design. With an emphasis on device-circuit topology interaction and optimization, it gives circuit designers and students alike an in-depth understanding of device structures and process limitations affecting circuit performance.

Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation

13th International Workshop, PATMOS 2003, Torino, Italy, September 10-12, 2003, Proceedings
Author: PATMOS 2003,Jorge Juan Chico,Enrico Macii
Publisher: Springer Science & Business Media
ISBN: 3540200746
Category: Computers
Page: 631
View: 629

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This book constitutes the refereed proceedings of the 13th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2003, held in Torino, Italy in September 2003. The 43 revised full papers and 18 revised poster papers presented together with three keynote contributions were carefully reviewed and selected from 85 submissions. The papers are organized in topical sections on gate-level modeling and characterization, interconnect modeling and optimization, asynchronous techniques, RTL power modeling and memory optimization, high-level modeling, power-efficient technologies and designs, communication modeling and design, and low-power issues in processors and multimedia.